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Verilog
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Trended #10 on daily
October 14, 2025
First tracked on GitTrend
October 14, 2025
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Languages
C
3%
C++
6%
Assembly
2%
HTML
2%
SystemVerilog
12%
Verilog
71%
Python
2%
JavaScript
1%
About
Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our door is wide open for backdoor scrutiny, be it related to RTL, embedded, build, bitstream or any other aspect of design and delivery package. Bujrum!
Topics
cocotb
embedded
fpga
iss
risc-v
rtl
verilator
verilog
vpn
vproc
wireguard
Languages
C
3%
C++
6%
Assembly
2%
HTML
2%
SystemVerilog
12%
Verilog
71%
Python
2%
JavaScript
1%